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02/26/96 1600 Fintronic uses Enhanced Cycle Simulation

Menlo Park, CA (Feb. 26, 1996) Fintronic USA, Inc. the supplier of high performance hardware description language driven simulators announces today that it has introduced enhanced cycle simulation technology (ECST) to its FinSim verilog simulator, in addition to its already existing event-driven, compiled and interpreted technologies.

Whereas traditional cycle-based technology only takes into account clocks as defining cycles at which the circuit must be evaluated, the enhanced cycle simulation technology developed by Fintronic considers general control signals to define areas of the circuit that can be simulated with cycle-based techniques, and utilizes state dependent critical path calculation for accuracy of results in the presence of timing information.

As opposed to some other cycle-based products which require modifications to existing designs and libraries in order to employ the cycle-based paradigm, Fintronic's ECST does not require a special design methodology. The entire Verilog language is supported. FinSim automatically identifies circuit areas suitable for enhanced cycle simulation, event-driven simulation, interpreted simulation, compiled simulation, etc. and simulates each such area with the most appropriate algorithm for fastest simulation without compromising the simulation results or the timing information associated with the results. FinSim's enhanced cycle simulation technology is currently very effective even in the presence of timing information and fully supports the handling of X's and Z's as well as the the entire range of Verilog strengths.

"By using enhanced cycle simulation technology, FinSim has become more than two times faster than VCS 2.2 on benchmarks on which VCS 2.2 was reported to be the leading software simulator last year in a benchmark report produced by DA Solutions. It is important to note that the high simulation performance is achieved with little additional analysis time" says Dr Alec Stanculescu, president of Fintronic USA.

In addition to this ground-breaking technology, FinSim also offers a new, faster interpretation engine and an improved gate level algorithm for the areas of the circuit which are not suitable for enhanced cycle simulation.

FinSim applies traditional compiler optimization technology such as constant propagation, common subexpression elimination, and dead code elimination for better performance in all the simulation paradigms used, including in interpreted, compiled, event-driven, and enhanced cycle simulation. In addition to the traditional compiler optimizations, FinSim performs numerous optimizations specific to the Verilog language semantics. Addressing the increased density of current and future designs, FinSim has considerably reduced its memory consumption by using both newly redesigned data structures and new technology specifically targeted at lowering memory requirements.

Platform support:

FinSim features the highest platform versatility in the industry by running on all popular platforms including UNIX for SUN, SGI, HP, DEC, Windows NT, Windows 3.1 and Windows 95, Linux and Sony NEWS.

Third Party Integration:

FinSim is tightly integrated with third party graphical environments such as SignalScan from Design Acceleration, Veribest from Veribest Inc., Ishizue from IK Technology, Undertow from Veritools, and ECS from Data I/O.

Pricing and Availability:

Fintronic USA's FinSim simulator featuring high performance Verilog Simulation is priced from $995 to $20,000 depending on product configuration and platform, and is available now. It is sold by Fintronic USA, Inc., IK Technology, and Intergraph. The Verilog Analyzer from Fintronic USA, is currently part of products sold by Intergraph, Nextwave, ZyCAD, IST, IKT, and IKOS. Fintronic has a Web page at http://www.fintronic.com, which can be used for placing orders, requesting demo licenses, checking prices, etc. Fintronic provides hotline support and software distribution via the Internet. For more information contact Dr Alec Stanculescu, president, at (650) 349 0108/x105 or e-mail him at alec@fintronic.com.

Mission:

Fintronic has a mission to supply the highest performance Verilog HDL simulators available for full language design verification and timing simulation. It is privately held and privately funded.

Acknowledgements:

Fintronic USA, Inc. acknowledges trademarks or registered trademarks of other organizations for their respective products and services.

 


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