1.0 Introduction 1

1.1 Purpose of this document 1

2.0 Installation 2

2.1 Super-FinSim directory structure 2

2.2 Super-FinSim installation guide 2

2.2.1 Installing the UNIX distribution 2

2.2.2 Installing the Windows distribution 4

2.3 Host `C' compiler 6

2.4 Super-FinSim environment variables 6

3.0 How to use the compiler 7

3.1 Operations performed by the compiler 7

3.2 Invoking the Verilog Compiler 7

3.2.1 Verilog Compiler Options 8

3.2.2 Precedence order for simulation mode options 16

3.3 Files generated by the Verilog compiler finvc 17

3.4 Incremental recompilation 17

3.5 Separate compilation 17

3.5.1 Compiling a Verilog Design Hierarchy into object code for later reuse 17

3.5.2 Using a separately compiled hierarchy 18

3.5.3 Restrictions 18

3.6 Calling user C tasks/functions in Super-FinSim without the PLI interface 19

3.7 Using Mixed Verilog/SysytemC descriptions 20

3.7.1 3.7.2 Instantiating SystemC modules in Verilog 20

3.7.2 3.7.3 Invoking finvc when there are SystemC modules involved 20

3.7.3 3.7.4 Rules to be observed by SystemC modules instantiated in Verilog: 20

3.7.4 3.7.5 Invoking TOP.sim or the name of the simulator 21

4.0 How to build the simulator 21

4.1 Operations performed by the simulation builder 21

4.2 Invoking the simulation builder 22

4.2.1 Simulation builder options 22

4.2.2 Removing system files 23

5.0 Building the PLI interface in Super-FinSim 23

5.1 Using the Fintronic PLI table 23

5.1.1 Creating the table manually 24

5.1.2 Creating the table automatically 25

5.2 Building a custom compiler 25

5.3 Building the simulator with PLI 26

5.4 Using multiple veriusertfs tables 26

6.0 How to use the simulation engine 28

6.1 Operations performed by the simulation engine 28

6.2 Invoking the simulator 28

6.3 Simulator Options 28

6.4 Simulation Modes 30

6.4.1 Batch Simulation 30

6.4.2 Interactive Simulation 30

6.4.3 Using script files 30

6.4.4 The Save and Restart feature in Super-FinSim. 31

6.5 Starting a real time waveform display 32

6.6 Simulation output 33

6.7 Interrupting the simulator 33

6.8 Terminating the simulator 33

7.0 Super-FinSim Interactive commands 34

7.1 List of interactive commands 34

7.2 Processing simulation data structures 37

7.2.1 Build 38

7.2.2 Init 38

7.3 Running the simulation 38

7.3.1 Run 38

7.3.2 Cont 38

7.4 Handling of simulation scope 38

7.4.1 Cd 38

7.4.2 Ls 39

7.5 Querying of simulation objects 39

7.5.1 Info 39

7.5.2 Value 39

7.5.3 Force 39

7.5.4 Release 40

7.6 Super-FinSim environment variables 40

7.6.1 Setenv 40

7.6.2 Printenv 40

7.7 Miscellaneous system facilities 40

7.8 Simulation Help Facility 41

7.9 Command history 42

7.10 Command aliasing 42

8.0 Support for FinSimMath 42

8.1 Introduction 42

8.2 Variable Precision Fixed Point and Floating Point Support in Super-FinSim 43

8.3 Introduction 43

8.4 Values of VP registers 43

8.5 Specifying VP objects 44

8.5.1 Introduction 44

8.5.2 Setting the fields of the descriptor 46

8.5.3 The Default Descriptor 47

8.6 VP register manipulation 47

8.6.1 Simple Assignments toVP registers 47

8.6.2 Arithmetic Operators operating on VP registers 49

8.6.3 Logical Operators involving VP registers 50

8.6.4 Assignments to non-VP objects 50

8.6.5 Trigonometric Direct and Inverse Functions 51

8.6.6 Hyperbolic direct and Inverse Functions 51

8.6.7 Functions returning universal constants 52

8.6.8 Logarithm and Exponential Functions 52

8.6.9 Other Functions accepting VP registers as operators 53

8.6.10 Using Special Condition Signals/Flags of VP registers 54

8.6.11 Assigning VP registers to verilog registers 54

8.6.12 Assigning Verilog Real to Verilog registers 54

8.6.13 Displaying VP register values 55

8.6.14 I/O of VP registers 55

8.6.15 Plotting data 55

8.7 Cartesian and Polar types 56

8.7.1 Type VpComplex 56

8.7.2 Type VpPolar 56

8.7.3 Type VpFComplex 57

8.7.4 Type VpFPolar 57

8.7.5 Operators on Cartesian and Polar types 57

8.8 Operations on Multi-dimensional arrays 57

8.8.1 Populating Multi-dimensional arrays with values 57

8.8.2 Viewing elements of a multi-dimensional array as part of a different structure 59

8.8.3 Displaying Multi-dimensional Arrays 60

8.8.4 Norms and Distances 61

8.8.5 Sparse Matrices 61

8.8.6 Fast Fourier Transform: $VpFft and $VpIfft 62

8.8.7 Discreete Cosine Transform: $VpDct and $VpIdct 63

8.8.8 Linear Differential Equations 63

8.8.9 Numeric Differentiation and Integration 64

8.8.10 Symbolic Computation 64

9.0 Tour of the Super-FinSim design environment 66

9.1 Running Super-FinSim in pure interpreted mode 66

9.2 Running Super-FinSim in mixed mode 66

9.3 Running Super-FinSim in accelerated mode 66

9.4 General simulation tips 67

10.0 The Graphical User Interface for Super-FinSim 67

10.1 Super-FinSim status codes and errors 69

10.2 Syntactic errors 70

10.3 Semantic errors 70

10.4 Simulation errors 70

10.5 Compiler Internal errors 70

10.6 Simulation Internal errors 70

11.0 Running FinSim with Code Coverage 70

11.1 Introduction 70

11.2 Code Coverage Information 71

11.3 Display the Code Coverage Information 71

11.4 Graphical User Interface for Code Coverage 72

12.0 Running FinSim with third party tools 72

12.1 Running Super-FinSim with Specman 72

12.1.1 Verilog Compilation. 73

12.1.2 Building the simulator. 73

12.1.3 Running the simulation. 74

12.2 Running Super-FinSim with Debussy 75

12.3 Running Super-FinSim with Undertow 75

13.0 Super-FinSim Implementation Notes 75

13.1 Unsupported system tasks/functions 76

13.2 Default files 76

13.2.1 Default VCD dump file 76

13.2.2 Default simulation log file 76

13.2.3 Default simulation key file 76

13.2.4 Default SDF log file 76

13.3 Super-FinSim system limitations 76

13.4 Limitations of the host `C' compiler 76

14.0 Platform specific Implementation Notes 77

14.1 HP-UX 77

14.2 Solaris 77

14.3 Solaris 64 bit 77

14.4 Sony NEWS 77

14.5 Windows 95/98/ME/2000/NT 77