W elcome to
Fintronic USA

redball.gif (326 bytes)About Fintronic USA

redball.gif (326 bytes)Main announcements

redball.gif (326 bytes)What's new at Fintronic

redball.gif (326 bytes)What our customers are saying...

redball.gif (326 bytes)Support for SystemC

redball.gif (326 bytes)Support for Verilog 2001

redball.gif (326 bytes)Third party tools integrated with FinSim(Specman, Denali, Debussy, Undertow, Vera, VirSim, HDL Score, Comet, Meteor, NelSim, Pivot, DeskPOD, @Designer 2.1)


DSP Designers perform a one million point FFT in Verilog in under 1 second!

The example below run in approx 1.67 seconds on an Intel i3 2.3GHz. It performed the sequence VpFft, VpIfft. The two transformations are perfomed in-place on the contents of xformFC, which is of type VpFComplex. VpFComplex indicates a complex number in cartesian coordinates with fields of type real.

The parameter SIZE is set to 1024 * 1024

Note that the size of the array upon which VpFft and VpIfft are called must be a power of 2 for the given FFT algorithm to work.

 module top;
   parameter SIZE = 1024 * 1024;
   real d;
   VpFComplex xformFC [0:SIZE - 1];
   VpFComplex origFC [0:SIZE - 1];

   initial begin
     $InitM(xformFC, (($I1==3) ? 7.0 : 0.0), 0.0);
     $InitM(origFC, (($I1==3) ? 7.0 : 0.0), 0.0);
     $VpFft(xformFC, 0, SIZE-1);
     $VpIfft(xformFC, 0, SIZE-1);
     d = $VpDistAbsMax(xformFC, origFC);
     $display("maximum error=%e\n", d);     


Copyright 1999-2011, Fintronic USA, Inc.   All rights reserved.